File:Edge triggered D flip flop.svg - Wikimedia Commons
Telecommunication and Electronics Projects: Positive Edge D Flip Flop using 6 NAND gates only
Rising Edge Triggered D Flip Flop
Designing of D Flip Flop
flipflop - Explanation of Edge Triggered D type flip flop triggered at positive edge of the clock pulse cycle (from Morris Mano Book)? - Electrical Engineering Stack Exchange